1. Field of the Invention
The following description relates to a memory chip having a terminal for sending and/or receiving high-frequency signals. The description further relates to a method for operating a memory chip.
2. Description of the Related Art
In memory systems, use is normally made of a multiplicity of memory chips that are operated via a memory bus. Control command signals, clock signals, data signals and address signals are generally connected to the memory chips via the memory bus. The memory bus comprises signal lines that normally connect the memory chips to one another and to a memory controller. However, during transmission of high-frequency signals, signal reflections that disturb the data transmission on the memory bus and thereby limit the data transmission rates can occur at the terminals of the memory chips. It is necessary for this reason when transmitting data via the memory bus to provide suitable terminations at the terminals of the memory chips in order to reduce the signal reflections on the signal lines.
It has previously been provided in the case of memory chips to switch the termination on or off at a terminal of the memory chip as a function of a termination signal. That is to say, the memory controller makes a suitable termination signal available to each of the memory chips in order to support the following read, write or other operation onto the memory chips with an optimal termination at all the memory chips connected to the memory bus. The disadvantage of such a control of the memory chips consists in that switching the terminating resistors on and off is not sufficient as a rule to achieve an optimal termination in every operating state, and thus, also not sufficient to improve the data transmission via the memory bus.
Furthermore, it can be provided that the strength of the terminating resistors in the memory chips is fixed in accordance with a configuration value that is communicated to the memory chips by the memory controller in an initialization phase at the beginning of the operation of the memory system. Setting the configuration values in the memory chips before each write and read operation is time consuming. Consequently, the initial presetting of the terminating resistor by the configuration value is also not suitable for providing terminating resistors for applying to the memory bus that are suitable for every case of addressing the memory chips of the memory system, since the access time in the memory system would thereby be slowed down substantially.